Marcel Teunissen is a Defectivity & Contamination Control Architect at ASML. He has more than 20 years of experience in the semiconductor industry with a primary focus on Lithography. The last 14 years he has been working on Defectivity & Contamination Control, with his current focus on this for EUV lithography. Marcel holds a Master of Science Degree in Chemical Engineering from the Technical University of Eindhoven and is a member of the IRDS UPW group.
