Drew Sinha is lead Process Engineer for over 27 years responsible for wet etching and cleaning of silicon wafer as part of wafer surface preparation required for advanced semiconductor manufacturing. Currently he is an active member of Electrochemical Society and UPW IRDS team involved in defect reduction and yield improvement of semiconductor devices processing with current and future Front-End-of-Line (FEOL) cleaning technologies. He received MS and Ph.D in Chemical Engineering from Columbia University in New York City and Wayne State University in Michigan respectively.

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